70 empleos en Tijuana de Electronica

Software Engineer - AI Solution Enablement Engineer (Semiconductors)

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications 2+ years of academic or work experience with Programming Language such as C, C++, Java, Python, etc. Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. Proven experience working with engineering workflows, developer tools, or internal platforms in large or complex engineering organizations. Hands‑on experience building, enabling, or operationalizing AI‑powered or agent‑based solutions, such as workflows, assistants, or automation systems. Demonstrated ability to translate complex technical capabilities into clear, reusable patterns, templates, and guidance that others can adopt independently. Strong communication and collaboration skills, with experience training, enabling, or influencing engineers across multiple teams and disciplines. Preferred Qualifications Master's degree in Engineering, Information Systems, Computer Science, or related field and 1+ year of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field. Experience with agent frameworks, AI orchestration, or workflow automation platforms in an enterprise setting. Familiarity with enterprise AI platforms, internal developer tooling, and AI governance or enablement models. Experience designing, delivering, or scaling technical training programs, workshops, or certification initiatives. Background in platform enablement, developer productivity, or technology adoption roles, especially in cross‑team environments. Location: Santa Fé, Tijuana

Mayo 29 2026 en Tijuana

Physical Verification Engineer (Semiconductors)

North American Production Sharing de México, S.A. de C.V.

Minimum 2 years of experience in a hands-on PDK role. Expertise in Calibre/ICV/Pegasus runset coding for DRC/LVS/ERC/PERC/MPT/ESD/Latch-up/Antenna, etc. Experience with developing and customization of the StarRC/Calibre-xACT/QRC parasitic extraction flows. As a member of the Physical Verification CAD team, you will maintain and improve all aspects of physical verification flow and methodology. Code custom checks such as Layout/Programmable ERCs, addition of custom devices in LVS, implementation of custom design rules (DRCs), etc., to meet design team requirements. You will need to have a deep understanding of design rule checks (DRC) and layout versus schematic (LVS) runsets, writing from scratch and/or modifying existing ones. Proficiency in integration and tech setup of Calibre LVS with StarRC/QRC and other extraction tools. Utilizing your hands-on skills to revamp/rewrite and streamline the PEX flow. Understanding of Digital/Custom/Analog requirements for various post layout electrical flows. Develop custom extraction solutions for transistor level for design team requirements. Hands-on experience with Field solvers and RC reduction tools. Support design teams with solving their PEX challenges. Support the design teams with solving their PV challenges to facilitate the IP release and chip tapeouts. Collaborate with tool vendors and foundries for tools and flow improvements. Knowledge of deep sub-micron FINFET, Planar, SOI and PMIC process technologies and mask layout design. Proficiency in one or more of the programming/scripting languages – SKILL, Python, Unix, Perl and TCL. Good communication skills and ability to work collaboratively in a team environment. Educational Requirements Required: Bachelor's, Electrical Engineering (with Master’s preferred).

Mayo 29 2026 en Tijuana