369 empleos de Ingeniería

Memory Mask Layout Design Engineer - Foránea

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Associate’s degree/Certificate in computer Science, Mathematics, Electrical Engineering or related field Basic understanding of CMOS technology and IC design principles. Strong attention to detail and ability to work in a team environment. Preferred Qualifications : Bachelor’s degree in computer science, Engineering, or related field. Understanding of parasitic effects and reliability considerations. Familiarity with scripting languages (SKILL, Python) for layout automation. Knowledge of advanced process nodes (e.g., FinFET, GAA) is a plus.

Enero 19 2026 en Tijuana

ASIC DRAM Bus and PDN Designer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5 and 3D Chip partition and dependencies on Product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM Bus and PDN Designer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5 and 3D Chip partition and dependencies on Product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM Bus and PDN Designer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5 and 3D Chip partition and dependencies on Product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM Bus and PDN Designer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5 and 3D Chip partition and dependencies on Product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM Bus and PDN Designer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5 and 3D Chip partition and dependencies on Product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM Bus and PDN Designer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5 and 3D Chip partition and dependencies on Product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM Bus and PDN Designer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5 and 3D Chip partition and dependencies on Product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM Bus and PDN Designer - Foránea

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5 and 3D Chip partition and dependencies on Product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM Bus and PDN Designer

North American Production Sharing de México, S.A. de C.V.

Desired Skillset/Experience: Experience with 2.5D and 3D STCO and pathfinding. 2.5 and 3D Chip partition and dependencies on Product KPI like performance, power, chip and beachfront area, chip-chip communication metrics, power grid, etc. System and/or chip-level architecture and physical design experience for 3D cache partitioning (a plus). Physical design experience with SoIC and/or CoWoS. Experience with 2.5D/3D IC design flow and PDK development. Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallization. Process development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessment. Custom layout, svrf, scripting skills. Hands-on experience with DRC, LVS, PEX (a plus). Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor's degree in science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM Circuit Design - Foránea

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Experience with 2.5D and 3D STCO and pathfinding. Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving 2.5D/3D chiplets and networking technologies. Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes. Basic programming skills e.g., ability to model (e.g., in Python or other languages), system use case impact of 3D architectures, and integration schemes. Master's or PhD in Electrical Engineering, Computer Science, or a related field. Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor’s degree in science, Engineering, or related field and 5+ years of relevant heterogeneous System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of heterogeneous System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of heterogeneous System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM circuit design - Foránea

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Experience with 2.5D and 3D STCO and pathfinding. Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving 2.5D/3D chiplets and networking technologies. Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes. Basic programming skills e.g., ability to model (e.g., in Python or other languages), system use case impact of 3D architectures, and integration schemes. Master's or PhD in Electrical Engineering, Computer Science, or a related field. Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor’s degree in science, Engineering, or related field and 5+ years of relevant heterogeneous System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of heterogeneous System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of heterogeneous System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM circuit design - Foránea

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Experience with 2.5D and 3D STCO and pathfinding. Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving 2.5D/3D chiplets and networking technologies. Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes. Basic programming skills e.g., ability to model (e.g., in Python or other languages), system use case impact of 3D architectures, and integration schemes. Master's or PhD in Electrical Engineering, Computer Science, or a related field. Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor’s degree in science, Engineering, or related field and 5+ years of relevant heterogeneous System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of heterogeneous System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of heterogeneous System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM circuit design - Foránea

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Experience with 2.5D and 3D STCO and pathfinding. Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving 2.5D/3D chiplets and networking technologies. Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes. Basic programming skills e.g., ability to model (e.g., in Python or other languages), system use case impact of 3D architectures, and integration schemes. Master's or PhD in Electrical Engineering, Computer Science, or a related field. Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor’s degree in science, Engineering, or related field and 5+ years of relevant heterogeneous System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of heterogeneous System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of heterogeneous System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM circuit design - Foránea

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Experience with 2.5D and 3D STCO and pathfinding. Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving 2.5D/3D chiplets and networking technologies. Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes. Basic programming skills e.g., ability to model (e.g., in Python or other languages), system use case impact of 3D architectures, and integration schemes. Master's or PhD in Electrical Engineering, Computer Science, or a related field. Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor’s degree in science, Engineering, or related field and 5+ years of relevant heterogeneous System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of heterogeneous System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of heterogeneous System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM circuit design - Foránea

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Experience with 2.5D and 3D STCO and pathfinding. Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving 2.5D/3D chiplets and networking technologies. Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes. Basic programming skills e.g., ability to model (e.g., in Python or other languages), system use case impact of 3D architectures, and integration schemes. Master's or PhD in Electrical Engineering, Computer Science, or a related field. Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor’s degree in science, Engineering, or related field and 5+ years of relevant heterogeneous System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of heterogeneous System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of heterogeneous System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM circuit design - Foránea

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Experience with 2.5D and 3D STCO and pathfinding. Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving 2.5D/3D chiplets and networking technologies. Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes. Basic programming skills e.g., ability to model (e.g., in Python or other languages), system use case impact of 3D architectures, and integration schemes. Master's or PhD in Electrical Engineering, Computer Science, or a related field. Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor’s degree in science, Engineering, or related field and 5+ years of relevant heterogeneous System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of heterogeneous System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of heterogeneous System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM circuit design

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Experience with 2.5D and 3D STCO and pathfinding. Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving 2.5D/3D chiplets and networking technologies. Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes. Basic programming skills e.g., ability to model (e.g., in Python or other languages), system use case impact of 3D architectures, and integration schemes. Master's or PhD in Electrical Engineering, Computer Science, or a related field. Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor’s degree in science, Engineering, or related field and 5+ years of relevant heterogeneous System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of heterogeneous System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of heterogeneous System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM circuit design - Foránea

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Experience with 2.5D and 3D STCO and pathfinding. Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving 2.5D/3D chiplets and networking technologies. Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes. Basic programming skills e.g., ability to model (e.g., in Python or other languages), system use case impact of 3D architectures, and integration schemes. Master's or PhD in Electrical Engineering, Computer Science, or a related field. Ability to work across teams and BUs. Ability to work without supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Education: Bachelor’s degree in science, Engineering, or related field and 5+ years of relevant heterogeneous System and technology or related work experience. OR master's degree in science, Engineering, or related field and 4+ years of heterogeneous System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of heterogeneous System and technology or related work experience.

Enero 19 2026 en Tijuana

ASIC DRAM PHY Designer - Foránea

North American Production Sharing de México, S.A. de C.V.

Minimum Qualifications: Excellent understanding of generic and AI use case KPI dependency on process and system architecture involving chiplets and networking technologies. Good knowledge of heterogeneous architecture, 2.5D/3D integration schemes. Basic programming skills e.g., ability to model in Python or other languages system use case impact of 3D architectures and integration schemes. Master's in Electrical Engineering, Computer Science, or a related field. Ability to work without much supervision and as part of a team. Most tasks do not have defined steps; simultaneous use of multiple mental abilities is generally required to determine the best approach. Advanced data analysis and interpretation skills are required. Minimum Qualifications: Bachelor's degree in Science, Engineering, or related field and 5+ years of AI relevant System and technology or related work experience. OR Master's degree in Science, Engineering, or related field and 4+ years of AI relevant System and technology or related work experience. OR PhD in Science, Engineering, or related field and 3+ years of AI relevant System and technology or related work experience.

Enero 19 2026 en Tijuana